All about the LPC1343 USB Bootloader

So, you want to use the USB bootloader function built into the LPC1343? Personally, I think this is one of the coolest built in functions. Why? A lot of chips have serial bootloaders. In fact, all of the NXP LPC series chip have a built in bootloader. Why is the USB bootloader so cool?

Why is the USB bootloader so cool?

Who has a serial port?

Serial bootloaders are great if you don't want to buy an expensive JTAG or programmer. However, they have some shortcomings. First, you need a serial port. In the past 10 years, serial ports have slowly disappeared from computers. Often, you need a USB to Serial converter or level shifter, which defeats the purpose of not having a JTAG or programmer.

Speed is everything

Serial is slow. If you are lucky, you get 115200 baud to work on the LPC bootloader. Usually, I'm stuck at 57600. Regardless, USB is fast. 12Mbit. Programming the device happens in the blink of an eye.

Built in goodies

Guess what? That USB bootloader implements a lot of code. Code that you can use. The LPC1343 bootloader resides in ROM and contains all the code necessary for a USB Mass Storage Device. All you have to do is fill out the necessary USB device info, call an init function, and then a connect function. The ROM saves you around 8K memory space, and a lot of headaches (if you know some stuff about it).

Great! How do I use it?

If you want to implement the USB bootloader functionality into a new design using the LPC1343, you need to know the following.

Crystal/Oscillator selection

The USB bootloader code expects a 12Mhz external clock source. Why does this matter? The bootloader must set up the USB PLL in order to generate the 48MHz clock used in USB. The PLL settings are hard coded into the ROM. Any other frequency other than 12MHz will cause the the bootloader to crash and not function.

Soft Connect

It took some digging to figure out what 'Soft Connect' does. In short, the Soft Connect feature allows you to control when the host device detects that a new end device becomes available. It does this by connecting a 1.5K pull-up resistor to 3.3V. What does that mean for you? The device now can control when it must respond to host commands, allowing it to execute any initiation code without time constraints. Additionally, you can disconnect and reconnect the device without physically removing the device.

Most reference designs use a PNP BJT. A P-channel FET works just as well, reduces current consumption, and is available in ridiculously tiny packages.

Here is my reference design which is known to work

If you can guarantee your code will service the USB Host requests in time, and your device is powered only off of USB power, you can bypass Soft Connect by just connecting a 1.5k Ohm pull-up resistor from +3.3V to the D+ line.

Boot Select Pins

All LPC chips have a boot select pin. On page 319 of the user manual you can find the needed pin configuration to initiate the bootloader code on start-up. If PIO0.1 is pulled low at start-up, the LPC1343 will begin in ISP mode. PIO0.3 determines whether the serial bootloader or the USB bootloader begins. If you notice, PIO0.3 also functions as USB_VBUS, which monitors the presence of USB power. PIO0.3 happens to be 5V tolerant, however, as a minimum, you should include a current limiting resistor of at least 2k Ohm in series with the USB power to reduce the risk of shorting USB power to ground. By connecting USB_VBUS properly to the USB +5V bus, the LPC1343 will automatically choose USB enumeration when USB is present and the chip is told to boot into ISP mode.

Noise Reduction

All good practices should be used to reduce noise on the USB lines. The 33 Ohm resistors in series with the data lines shown in the reference design help match line impedance to harmful reduce reflections. If you aren't familiar with transmission lines, just add them. The 18pF capacitors also help reduce noise in several ways. Be sure your USB lines run parallel and are as short as possible, don't make right angles, etc...

What do I need to know to use the ROM USB MSC code?

The ROM MSC functions use the CT32B1 (32 bit, Timer 1)

The ROM needs to use a 32 bit timer. It uses Timer 1. Don't use it. Don't configure it. Leave it alone and forget about it. If you need a 32 bit timer, use CT32B0. Configuring the timer and then calling the ROM MSC functions will give you a headache. Things won't work and you'll have no indication why.

The ROM MSC functions change the system clock

I have not seen this documented anywhere. When you initialize USB using the ROM drivers, you nuke whatever PLL settings you previously used. What you end up with is a 48MHz system clock. You must accommodate the changed clock speed when setting up any other peripheral clock.

The ROM MSC functions only support 32 bit addresses

The callback functions only use 32 bit addresses and access memory 64 bytes at a time. Don't expect to be able to use more than 2GB of memory in your mass storage device. If you are using memory with sectors larger than 64 bytes, expect to buffer reads and writes to improve performance.

Why you shouldn't use the USB Bootloader

If you develop code for the LPC1343, better alternatives exist. The JTAG on the LPC1343 only requires 2 signals, SWDIO and SWCLK, plus a ground. For these 3 connections you get full debug capabilities; break points, memory access, etc. Adding a JTAG will save you time and headaches. The USB bootloader becomes useful once you have a mature firmware. I highly recommend using the JTAG, if possible.